Job Opportunities API

At   Kandou , we are redefining the economics of AI infrastructure. Our mission is to   democratise AI by significantly reducing the Total Cost of Ownership (TCO)   of hardware systems — a critical barrier to scalable adoption. Our proprietary  MIMO-over-copper technology   powers a   high-performance, chiplet-based AI memory fabric   that is both   scalable and energy-efficient . Unlike traditional interconnects, our solution   reduces power consumption significantly   while preserving   high bandwidth and ultra-low latency   — unlocking unprecedented efficiency for AI training and inference at scale. Kandou’s architecture is not just an incremental improvement — it’s a  foundational shift   in how AI hardware is built for the future. Job Title: Analog Design Engineer (Advanced Research and Development Department) Job Location: Switzerland Key responsibilities • Develop block level specifications and models for target designs • Develop, model, design, and verify performance of custom analog circuits in advanced technology nodes • Layout design and development, including floor-planning, guiding layout engineers, and post-layout verification • Design verification at different levels (pre- and post-layout, variation-aware) • Support and collaborate with the design team, including other design and layout engineers, architects and chip level integration engineers, modeling and system level designers. • Support for post-silicon lab bring-up, debug, characterization and productization. • Produce reports (progress report, analysis, design, modeling, and verification reports) • Participate in developing concept level architectures and circuits Skills • Deep understanding on design and layout techniques for high-speed and high-precision circuits, problem solver, and excellent analytical skills. • Experience in developing testbenches and simulation setups to analyze performance of target circuits and systems. • Skillful in layout techniques, such as matching, parasitic estimation and reduction, and deep-submicron related issues. • Advanced user of EDA tool for design and verification, preferably Cadence Virtuoso, Spectre/HSpice, Calibre/PVS DRC/LVS, parasitic extraction and modelling, EM and IR drop tools, and ESD analysis, among others. • Self-motivated, with strong sense of ownership and responsibility. • Manage workload, schedules and report to internal management and technical teams. • Excellent communication and reporting skills. Experience • 5+ years of experience in design and layout of analog and mixed-signal circuits, especially high-speed and high-precision circuits. Examples are: multi-gigabit serial data-link transceivers, RF circuits, equalizers, clock generators, PLLs, clock and data recovery circuits, data converters (ADC or DAC), biasing and bandgap circuits. • MSc or PhD in electronics/electrical engineering (equivalent or higher). • Experienced with modern semiconductor process technologies, such as CMOS 28nm, and FinFET 16/14nm, 7nm. • Experienced in high-level modelling, top-level simulations, and signal integrity. • Solid background on Signal Processing and Communications If this is the role you have been looking for and you want to be part of a growing Company, with an exciting future then we would really love to hear from you. Together We Kandou It !